Processor - is the main chip company, its 'brain'. It executes the code that is in memory and manages all devices company. The greater the speed of the processor, the faster the computer. The processor has special cells that are called registers. Specifically, the registers are placed teams that run the processor, and more data to be operated on the team. The processor is to choose from the memory to a certain sequence of commands and data for the next run.
ProtsessorVo the process processor reads the sequence of commands contained in the memory, and executes them. This sequence of commands is called the program and is a useful algorithm processor. Sequential read command changes when the processor reads the transition team - then address the next command may be different. Another example of a change process is the option of a stop command or switch to a hardware interrupt.
CPU teams are considered the most lower level control computer, so the performance of each team, and certainly inevitable. No checking for validity of actions performed, in particular, does not check the possible loss of important data. To a computer has only been valid actions, teams must be properly organized in the desired program. The speed of the transition from one-step cycle to the next is determined by the clock. The clock generator produces pulses that serve to beat the CPU. Clock frequency is called frequency.
The main characteristics of processors are considered: capacity and performance.
Performance - is a parameter indicating the number of cycles executed by a processor in a second. Measured in megahertz (MHz), 1 MHz = 1 million cycles per second. This parameter is greater than the faster processor.
Counts - a parameter which is considered important for devices such companies as internal registers, bus input data output bus memory addresses.
Variety of processors:
CISC-processors
Complex Instruction Set Computing - computing with complex set of commands. Processor structure based on the complicated set of commands. Ordinary members of the genus is CISC microprocessors Intel x86 (although for years has considered these processors CISC only external system commands).
RISC-processors
Reduced Instruction Set Computing (technology) - a set of calculations with abbreviated commands. Processor architecture that is based on an incomplete set of commands. Characterized by a fixed-length instructions, a huge number of registers, operations like register-register, and even lack of indirect addressing. RISC concept invented by John Koch (John Cocke) from IBM Research, the name coined by David Patterson (David Patterson). The best-known implementation of this architecture is presented series processors PowerPC, including G3, G4 and G5. Quite popular implementation provided architecture - MIPS processors series and Alpha.
MISC-processors
Minimum Instruction Set Computing - Computing with the smallest set of commands. The further development of the ideas the team of Chuck Moore, who believes that the principle of simplicity, initially for RISC processors, soon receded into the background. In the heat of the struggle for the highest performance, RISC overtook and passed nearly all the CISC processor complexity. MISC architecture is based on the stack of computer models with a limited number of teams (about 20-30 teams).
Multi-core processors
Contain multiple processor cores in a single package (one or several crystals). Processors designed for a single copy of the operating system on multiple cores, suggest a highly integrated implementation of the "multiprocessor". At this point, the mass of available processors with 2 cores, including Intel Core 2 Duo and a Conroe Athlon64X2 based microarchitecture K8.
In November 2006 came the first quad-core Intel Core 2 Quad on the core Kentsfield, which is an assembly of 2-crystals Conroe in one case. Dual-core potsessorov includes such things as the availability of the logical and physical cores: eg dual core processor Intel Core Duo consists of the 1st physical core, which in its own turn is divided into two logical partitions. Intel Core 2 Duo consists of 2-physical cores, which significantly affects the speed of his work.
Milestones looping commands: Processor
processor puts the number on the register counter, on the address bus, and allows memory read command;
date has been set is for the memory address, memory address and receiving a read command, expose content stored at the given address on the data bus, and reports on availability;
processor takes the number from the data bus, interprets it as a command (machine instruction) from his own command system and executes it;
if the last command is not a command transition, the processor increases by one (in the assumption that the length of each team is the same one) number stored in the Program Counter and the result appears there next instruction address;
again satisfied with the first point.